Super-junction semiconductor device
US6724042B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2001 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Mar 31, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
Abstract
Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with a first alternating conductivity type layer formed of n drift current path regions and p partition regions arranged alternately with each other, and a breakdown withstanding region with a second alternating conductivity type layer formed of n regions and p regions arranged alternately with each other, the breakdown withstanding region providing no current path in the ON-state of the device and being depleted in the OFF-state of the device. Since depletion layers expand in both directions from multiple pn-junctions into n regions and p regions in the OFF-state of the device, the adjacent areas of p-type base regions, the outer area of the semiconductor chip and the deep area of the semiconductor chip are depleted. Thus, the breakdown voltage of breakdown withstanding region is higher than the breakdown voltage of drain drift region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.