Body-tied silicon on insulator semiconductor device and method therefor

US6724048B2 · kind B2 · utility

Assignee

• Motorola, Inc. · US

Inventors

• Byoung W. Min · Austin, US
• Michael A. Mendicino · Austin, US
• Laegu Kang · Hopewell Junction, US

Key dates

• Filing date: Jun 16, 2003
• Grant date: Apr 20, 2004
• Expiry date: Sep 1, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/711

Abstract

An integrated circuit using silicon-on-insulator (SOI) has most of its transistors with their channels (bodies) floating. Some of the transistors, however, must have their channels coupled to a predetermined bias in order to achieve desired operating characteristics. In order to achieve the needed bias, a contact path is provided in the semiconductor layer of the SOI substrate and under an extension of the gate of the transistor. The extension is separated from the semiconductor layer by an insulator that is thicker than that for most of the transistor but advantageously is the same as that used for some of the thick gate insulator devices used, typically, for high voltage applications. This thicker insulator advantageously reduces the capacitance, but does not increase process complexity because it uses an insulator already required by the process.