Patent · US Expired

Programmable logic with lower internal voltage circuitry

US6724222B2 · kind B2 · utility

26Cited by

57References

23Claims

0Family size

Assignee

Altera Corporation · US

Inventors

Rakesh Patel · Cupertino, US
John E. Turner · Beaverton, US
John Lam · San Jose, US
Wilson Wong · San Francisco, US

Key dates

Filing date	Feb 13, 2003
Grant date	Apr 20, 2004
Priority date	—
Expiry date	Feb 13, 2023

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/018521
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A technique and circuitry interfaces a programmable logic integrated circuit compatible with one voltage level to other integrated circuits compatible with a different voltage level. In particular, an on-chip voltage less than the external supply level of the programmable logic integrated circuit is provided to a core portion of a programmable logic integrated circuit by way of a conversion transistor. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. Externally, the programmable logic integrated circuit will interface with an external supply voltage level. The input and output signals to and from the programmable logic integrated circuit will be compatible with the external supply level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.