Semiconductor integrated circuit patterns
US6727026B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2001 |
| Grant date | Apr 27, 2004 |
| Priority date | — |
| Expiry date | Apr 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of designing patterns of a semiconductor integrated circuit, the shape of each of a plurality of opening patterns formed by a plurality of contact holes is formed into a rectangular shape; and the contact holes are arranged in such a manner that a long side of each of the rectangular opening patterns is opposite to a long side of an adjacent rectangular opening pattern, and the positions of both ends of the long sides are trued up. Furthermore, a photomask is used for manufacturing a semiconductor integrated circuit as designed by the above method of designing patterns of a semiconductor integrated circuit, in which a plurality of rectangular opening patterns are provided thereon as a plurality of rectangular opening patterns for contact holes; and the a plurality of rectangular opening patterns are arranged in such a manner that adjacent long sides thereof are opposite to each other, and the position of both ends of each long side is trued up. Besides, a semiconductor device comprises a semiconductor integrated circuit designed by using a method of designing a semiconductor integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.