Method of performing back-end manufacturing of an integrated circuit device
US6730545B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2002 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Feb 27, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54473
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of performing back-end manufacturing of an integrated circuit (IC) device is disclosed. In one method embodiment, the present invention process a die-strip through a front-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The die-strip is then automatically provided to an end-of-line assembly portion. The die-strip is then processed through an end-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The present embodiment then automatically provides the die-strip to a test assembly portion. The die-strip is then tested by the test portion and then automatically provided to a finish assembly portion. The present embodiment then processes the die-strip through a finish portion which comprises a plurality of sub-stations operating on an in-line basis. Camera systems perform automated visual inspection of dies on the die-strip and maintain a database that can be used for automated reject management.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.