Formation of planar strained layers
US6730551B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2002 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Aug 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A structure and a method for forming the structure, the method including forming a compressively strained semiconductor layer, the compressively strained layer having a strain greater than or equal to 0.25%. A tensilely strained semiconductor layer is formed over the compressively strained layer. The compressively strained layer is substantially planar, having a surface roughness characterized in (i) having an average wavelength greater than an average wavelength of a carrier in the compressively strained layer or (ii) having an average height less than 10 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.