Shielded multi-conductor interconnect bus for MEMS
US6731513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2002 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Mar 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A shielded multi-conductor interconnect bus for use in interconnecting MEM devices with control signal sources or the like and a method of fabricating a shielded multi-conductor interconnect bus are disclosed. In one embodiment, a shielded interconnect bus formed on a substrate (20) includes a plurality of electrically conductive lines (42) arranged in sets of one, two or more conductive lines between electrically conductive shield walls (46, 66). The electrically conductive lines (42) are surrounded by layers of dielectric material (30, 50). An electrically conductive shield (78) overlies the electrically conductive lines (42) and electrically conductive shield walls (46, 66).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.