Non-volatile semiconductor memory device having shared row selection circuit
US6731540B2 · kind B2 · utility
38Cited by
8References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2002 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Aug 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A NAND flash memory device includes a first and second memory blocks. A shared row selection circuit is provided between the first and second memory blocks, selectively or simultaneously selecting the first and second memory blocks, and transferring wordline voltages to a selected memory block by means in a multi-boosting manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.