DDR memory and storage method
US6731567B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2003 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Jan 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a DDR memory and to a storage method for storing data in a DDR memory having a plurality of memory cells which each have a prescribed word length, in which a serial data input is used to read in serial data on a rising or falling edge of the data clock signal, and a serial-parallel converter is used to put together a prescribed number of data items from the data read in to give a prescribed number of words from data words having the prescribed word length.To make transferring the data from one synchronization area to another synchronization area, and resynchronization thereof, more reliable, the invention involves an interface memory copying the at least one data word from the serial-parallel converter upon receipt of a copy signal which is synchronous with the data block signal and outputting it to a bus upon receipt of an output signal which is synchronous with the system clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.