Memory circuit for use in hardware emulation system
US6732068B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2001 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | May 12, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S370/916
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A hardware emulation system is disclosed which reduces hardware cost by time-multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The reconfigurable logic system of the present invention comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common I/O pins and circuit board traces. A logic analyzer for a hardware emulation system is also disclosed. The logic circuits necessary for executing logic analyzer functions is programmed into the programmable resources in the logic chips of the emulation system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.