Address table overflow management in a network switch
US6732184B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2000 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Apr 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/742
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A switching system includes a multiport module having an address table for storing network addresses, and a host processor configured for selectively swapping the stored network addresses in the address table to an internal memory that serves as an overflow address table for the multiport switch module. The address table internal to the multiport module is configured for storing a prescribed number of network addresses for high-speed access, for example the most frequently-used network addresses. The host processor, configured for controlling the storage of network addresses between the address table and the external memory, uses the external memory as the overflow address table for storage of less frequently-used network addresses, for example addresses of network devices that transmit little more than periodic “keep-alive” frames. Hence, a large number of addresses may be managed by the switching system, without the necessity of an unusually large on-chip address table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.