Circuit and method for implementing a write operation with TCCT-based memory cells
US6735113B2 · kind B2 · utility
27Cited by
4References
64Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2002 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Nov 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a circuit and a method for providing nondestructive write operations and optimized memory access operations with reduced power consumption during memory access, such as during write operations. In one embodiment, a memory device comprises a memory cell configured to store a first data bit. The memory device also comprises a write access circuit coupled to the memory cell for providing a write data bit having a write data bit magnitude. The write access circuit is configured to adjust the write data bit magnitude to an intermediate logic state magnitude in a memory operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.