Method of fabricating integrated circuit devices having dielectric regions protected with multi-layer insulation structures
US6740531B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2001 |
| Grant date | May 25, 2004 |
| Priority date | — |
| Expiry date | Mar 7, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
Abstract
A dielectric region, such as a ferroelectric dielectric region of an integrated circuit capacitor, is protected by a multi-layer insulation structure including a first relatively thin insulation layer, e.g., an aluminum oxide or other metal oxide layer, and a second, thicker insulating layer, e.g., a second aluminum oxide or other metal oxide layer. Before formation of the second insulation layer, the first insulation layer and the dielectric preferably annealed, which can increase a remnant polarization of the dielectric region. The first insulation layer can serve as a hydrogen diffusion barrier during formation of the second insulation layer and other overlying structures. In this manner, degradation of the dielectric can be reduced. Devices and fabrication methods are discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.