Field-effect transistor, circuit configuration and method of fabricating a field-effect transistor
US6740910B2 · kind B2 · utility
66Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2003 |
| Grant date | May 25, 2004 |
| Priority date | — |
| Expiry date | Jan 28, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/938
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
The gate region of a field effect transistor comprises at least one through hole wherein a nanoelement is provided which is electrically coupled to the source and the drain. The nanoelement may have the conductance thereof controlled by means of the gate, such that the nanoelement forms a channel region of the field effect transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.