Circuit for preventing system malfunction in semiconductor memory and method thereof
US6741136B2 · kind B2 · utility
3Cited by
2References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 23, 2002 |
| Grant date | May 25, 2004 |
| Priority date | — |
| Expiry date | May 23, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for preventing a system malfunction in a semiconductor memory includes an oscillating circuit generating an oscillating clock signal by receiving an oscillating signal, a system clock generator generating a system clock signal by receiving the oscillating clock signal, and a malfunction preventing unit resetting an inner system by sensing an amplitude variation of the oscillating signal wherein the amplitude variation is caused by noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.