Exposure method and device manufacturing method using this exposure method
US6741732B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 6, 1998 |
| Grant date | May 25, 2004 |
| Priority date | — |
| Expiry date | Oct 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/31757
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In an exposure method of drawing and exposing a second pattern with a scanner so as to match a first pattern formed on a sample upon exposure with a reduction projection exposure apparatus, a matrix is set on the sample. A distortion correction map representing an offset of a point corresponding to each matrix point on the first pattern from an ideal position is formed. The blocks of the matrix, small for a large offset and large for a small offset, are set when drawing the second pattern while correcting drawing information of the second pattern on the basis of offset information represented by the correction map. The block size of the distortion correction map is not uniformly reduced. A small block size is set for a large distortion, and a large block size is set for a small distortion, thereby reducing the data amount. A necessary and sufficient block size is set for distortion correction to minimize the number of times of arithmetic operation for correction processing without increasing the memory size, thereby achieving high-speed processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.