Bilayer CMP process to improve surface roughness of magnetic stack in MRAM technology
US6743642B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 6, 2002 |
| Grant date | Jun 1, 2004 |
| Priority date | — |
| Expiry date | Dec 4, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in the interface between the tunnel junction layer and the magnetic layers. The method includes depositing first and second barrier layers on the conductor, wherein the first barrier layer has a polish rate different from that of the second barrier layer. The second barrier layer is then essentially removed by chemical mechanical polishing (CMP), leaving a very smooth and uniform first barrier layer. When the magnetic stack is then formed on the polished first barrier layer, interfacial roughness is not translated to the tunnel junction layer, and no corruption of magnetization is experienced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.