Kia-Seng Low
15Patents
9h-index
29Co-inventors
68Inventor score
Filing activity: Jul 20, 2001 → Mar 2, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6570256B2 | Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates | Electricity | 48 | Expired |
| US6985384B2 | Spacer integration scheme in MRAM technology | Electricity | 34 | Expired |
| US6743642B2 | Bilayer CMP process to improve surface roughness of magnetic stack in MRAM technology | Electricity | 25 | Expired |
| US6740539B2 | Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates | Electricity | 22 | Expired |
| US6858441B2 | MRAM MTJ stack to conductive line alignment method | Emerging Cross-Sectional Technologies | 20 | Expired |
| US6768150B1 | Magnetic memory | Electricity | 12 | Expired |
| US6846683B2 | Method of forming surface-smoothing layer for semiconductor devices with magnetic material layers | Electricity | 9 | Expired |
| US7087438B2 | Encapsulation of conductive lines of semiconductor devices | Electricity | 9 | Expired |
| US6680500B1 | Insulating cap layer and conductive cap layer for semiconductor devices with magnetic material layers | Electricity | 9 | Expired |
| US6884630B2 | Two-step magnetic tunnel junction stack deposition | Emerging Cross-Sectional Technologies | 7 | Expired |
| US7097777B2 | Magnetic switching device | Electricity | 7 | Expired |
| US6974770B2 | Self-aligned mask to reduce cell layout area | Electricity | 7 | Expired |
| US7125790B2 | Inclusion of low-k dielectric material between bit lines | Electricity | 6 | Expired |
| US8299622B2 | IC having viabar interconnection and related method | Electricity | 0 | Active |
| US8492268B2 | IC having viabar interconnection and related method | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.