Patent · US Expired

Test circuit

US6744272B2 · kind B2 · utility

12Cited by

8References

11Claims

0Family size

Inventors

Wolfgang Ernst · Munich, DE
Gunnar Krause · Munich, DE
Justus Kuhn · Birkenfeld, DE
Jens Luepke · Birkenfeld, DE
Jochen Mueller · Regensburg, DE
Peter Poechmueller · Burlington, US
Michael Schittenhelm · Poing, DE

Key dates

Filing date	Mar 18, 2002
Grant date	Jun 1, 2004
Priority date	—
Expiry date	Mar 24, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/48
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A test circuit is adapted to test circuits having a high-frequency clock signal. The test circuit is positioned between a conventional tester and the circuit to be tested. The test circuit includes a frequency multiplication circuit which multiplies the clock signal of the conventional tester to produce a high-frequency clock signal. The test circuit also receives control signals from the conventional tester. The control signals are output to the circuit to be tested via a bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.