One-mask metal-insulator-metal capacitor and method for forming same
US6750114B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Jun 26, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/957
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A capacitor structure formed on an insulation layer includes a lower electrode formed on a surface of the insulation layer, a dielectric layer formed on a surface of the lower electrode, an upper electrode formed on a surface of the dielectric layer, a first spacer formed on a side portion of the upper electrode, and a second spacer formed on a side portion of the first spacer and a side portion of the lower electrode. This capacitor structure is formed by depositing a metal-insulator-metal capacitor stack on top of a via, masking and etching an upper electrode of the metal-insulator-metal capacitor stack, depositing and etching a first spacer on an edge surface of the upper electrode, defining a lower electrode of the metal-insulator-metal capacitor based on the first spacer, depositing and etching a second spacer on a surface of the first spacer and an edge of the lower electrode, and forming a wiring layer on a surface of the upper electrode and a surface of the second spacer. This capacitor structure provides a capacitor that is not prone to leakage down the capacitor sidewall and the corresponding method of manufacture provides a capacitor that is fabricated with increased eff…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.