Semiconductor inspecting system for inspecting a semiconductor integrated circuit device, and semiconductor inspecting method using the same
US6750672B2 · kind B2 · utility
10Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Jun 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2882
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus to be inspected is mounted on one surface of a socket board. An auxiliary inspecting apparatus for adjusting timing of write signals transmitted from a semiconductor inspecting apparatus is mounted on the other surface of the socket board. Input/output (I/O) pins of the auxiliary inspecting apparatus are connected to corresponding I/O pins of the inspected device via through holes in the socket board on a one-to-one basis. This semiconductor inspecting method is thus capable of easily suppressing the delay difference between a plurality of signals output from the semiconductor inspecting apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.