Configuration and method for switching transistors
US6750697B2 · kind B2 · utility
2Cited by
7References
35Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 26, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Jul 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A configuration and a method for the simultaneous switching of transistors connected in series, one from the on state to the off state and the other from the off state to the on state ensures that, when the transistors are switched from the on state to the off state or from the off state to the on state, the gate potential of the transistor that is changed from the off state to the on state by the switching operation changes more slowly than the gate potential of the transistor that is changed from the on state to the off state by the switching operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.