Method of shallow trench isolation fill-in without generation of void
US6753237B1 · kind B1 · utility
1Cited by
7References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 28, 2003 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | Apr 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of shallow trench isolation fill-in to create the void-free trenches is disclosed. First, a liner oxide layer is formed in the trenches. Next, the silicon substrate is pre-wetted with DI water, and the liner oxide layer is etched by a chemical solution. The chemical solution is an oxide etchant, such as HF solution or BOE (buffered oxide etchant). The etching rate close to an opening of a trench is faster than a bottom of the trench. Finally, the trenches are filled with a HDP oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.