Voltage-mode pulse width modulation VLSI implementation of neural networks
US6754645B2 · kind B2 · utility
29Cited by
9References
19Claims
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Key dates
| Filing date | Mar 20, 2001 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | Aug 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A voltage-mode pulse width modulation (PWM) VLSI implementation of neural networks, comprising: a voltage-pulse converter for converting an input voltage into a neuron-state pulse; a synapse multiplier, including a multiplier cell for multiplying the neuron-state pulse by an input weight voltage and an integral and summation cell for integrating and summing up the multiplied output and producing a first output voltage; and a sigmoid circuit for converting the first output voltage into a second output voltage with the non-linear activation function of neuron.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.