Thin wafer carrier
US6758339B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Jul 11, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S206/832
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer carrier for carrying a plurality of axially aligned thin circular wafers. The wafer carrier has a framework portion formed from a pair of end members connected by a plurality of side support members. A pair of opposing sidewall assemblies is positioned between the pair of end members, and is attached to at least one side support member. Each sidewall assembly has a plurality of shelves defining a plurality of slots for receiving a wafer. The sidewall assemblies are formed from a plurality of stacked together individual shelf members. Each shelf member has a body portion with an upper surface and a lower surface. The lower surface has a plurality of pegs which are positioned to be received by a plurality of apertures formed in the upper surface of an immediately adjacent individual shelf member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.