Method of fabricating a gate structure of a field effect transistor using a hard mask
US6759286B2 · kind B2 · utility
11Cited by
4References
42Claims
0Family size
Inventors
Key dates
| Filing date | Sep 16, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Sep 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a gate structure of a field effect transistor, comprising forming a hard mask, etching a gate electrode, and contemporaneously forming a gate dielectric and removing the hard mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.