Method of forming a capacitor in a semiconductor device
US6759294B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 2, 2003 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Jul 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
Abstract
Disclosed is a method of forming a capacitor in a semiconductor device. The method comprises the steps of forming word lines on a semiconductor substrate in which semiconductor constitution elements are formed, sequentially forming a first interlayer insulating film, a first conductive layer and a second interlayer insulating film on the entire structure including the word lines, removing portions of the second interlayer insulating film, the first conductive layer and the first interlayer insulating film to form contact holes, forming a second conductive layer on the entire structure including the contact holes and then patterning the second conductive layer to connect the first and second conductive layers, removing the second interlayer insulating film without a mask process to form a bottom electrode consisting of the first and second conductive layers, etching the first conductive layer using the second conductive layer as an etch pattern without a mask process, and forming a dielectric film and a top electrode on the entire structure including the bottom electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.