Micromachined structures including glass vias with internal conductive layers anodically bonded to silicon-containing substrates
US6759309B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 28, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Jul 25, 2022 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B7/0006
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Disclosed herein are methods of preparing vertical electrical interconnects within multiple layers of substrates, where a portion of the substrate layers are glass and a portion of the substrate layers are single-crystal silicon. The methods taught herein can be used to prepare basic “units” which can be stacked and anodically bonded together to form electrically connected, multi-unit structures. The methods of the invention are particularly advantageous in the fabrication of microcolumns, and especially an array of microcolumns of the kind used in electron optics, including electron microscopes and lithography apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.