VDD detection path in power-up circuit
US6759852B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 24, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Jan 8, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16552
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A VDD power-up detection circuit is provided having a p-channel transistor having a source coupled to a VDD voltage supply terminal and a gate coupled to a ground supply terminal. A first resistor or a diode element is coupled between the drain of the p-channel transistor and the ground supply terminal. An n-channel transistor has a source coupled to the ground supply terminal and a gate coupled to the drain of the p-channel transistor. A second resistor is coupled between a drain of the n-channel transistor and the VDD voltage supply terminal. A trigger circuit is coupled to the drain of the n-channel transistor. As the VDD supply voltage increases during power-up, the p-channel and n-channel transistors are both turned on. At this time, the trigger circuit asserts a control signal that enables an associated circuit to operate in response to the VDD supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.