Patent · US Expired

System with phase jumping locked loop circuit

US6759881B2 · kind B2 · utility

61Cited by
31References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 25, 2003
Grant dateJul 6, 2004
Priority date
Expiry dateFeb 25, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/0814
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit device having a select circuit, a summing circuit and a phase mixer. The select circuit selects one of a plurality of offset values as a selected offset. The summing circuit sums the selected offset with a phase count value, the phase count value indicating a phase difference between a reference clock signal and a first plurality of clock signals. The phase mixer combines the first plurality of clock signals in accordance with the sum of the selected offset and the phase count value to generate an output clock signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.