Patent · US Expired

Semiconductor memory apparatus

US6760260B2 · kind B2 · utility

0Cited by
2References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 11, 2002
Grant dateJul 6, 2004
Priority date
Expiry dateNov 14, 2022

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C7/06
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor memory apparatus includes a memory cell array having a multiplicity of data lines and a multiplicity of local amplifiers, each of the local amplifiers being associated with a data line. An amplifier group includes at least two amplifiers selected from the multiplicity of local amplifiers. Each amplifier has at least a pair of selection transistors for selecting a particular amplifier from the amplifier group. The selection transistors have a common gate, an unshared intrinsic diffusion region, and a shared intrinsic diffusion region, the shared intrinsic diffusion region being shared with an adjacent selection transistor from an adjacent amplifier.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.