Method and system for prefetching utilizing memory initiated prefetch write operations
US6760817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2001 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Aug 22, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a processing unit, a system memory, and a memory controller coupled to the processing unit and the system memory. According to the present invention, the memory controller accesses the system memory to obtain prefetch data and transmits the prefetch data to the processing unit in a prefetch write operation specifying the processing unit in a destination field. In one embodiment, the memory controller transmits the prefetch write operation in response to receipt of a prefetch hint from the processing unit, which may accompany a read-type request by the processing unit. This prefetch methodology may advantageously be implemented imprecisely, with the memory controller responding to the prefetch hint only if a prefetch queue is available and ignoring the prefetch hint otherwise. The processing unit may similarly ignore the prefetch write operation if no snoop queue is available. Consequently, communication bandwidth is not wasted by the memory controller or processing unit retrying prefetch operations. In addition, because the memory controller directs prefetching, the processing unit need not allocate a queue to the prefetch operation, thus reducing the num…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.