Data processing system with on-chip FIFO for storing debug information and method therefor
US6760864B2 · kind B2 · utility
8Cited by
10References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 21, 2001 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Sep 6, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/364
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A debug module (20) is provided which allows a developer to capture three types of debug information. The three types of debug information are: change-of-flow addresses, CPU data, and current instruction addresses. The debug information is captured in an on-chip debug FIFO memory (30) during program development. The debug information is provided to an external host via a serial communication interface (14) for post-processing and analysis. Storing and retrieving program information in this way is useful in microcontrollers that do not provide external access to address and data bus signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.