Method for fabricating buried strap out-diffusions of vertical transistor
US6762099B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2003 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Jul 1, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/923
Abstract
A two-stage method for making buried strap out-diffusions is disclosed. A substrate having a deep trench is provided. A first conductive layer is deposited at the bottom of the deep trench. A collar oxide is formed on sidewalls of the deep trench. A second conductive layer is deposited within the deep trench atop the first conductive layer. The collar oxide is then etched back to a predetermined depth. A third conductive layer is deposited directly on the second conductive layer. A trench top oxide (TTO) layer is formed on the third conductive layer. A spacer is formed on the sidewalls of the deep trench. A portion of the TTO layer is etched away to form a recess underneath the spacer, which exposing the substrate in the deep trench. Thereafter, a doping process is carried out to form a first diffusion region through the recess, followed by spacer stripping. Finally, a thermal process is performed to out-diffuse dopants of the second conductive layer to the substrate through the third conductive layer, thereby forming a second diffusion region that merges with the first diffusion region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.