Reduced power analog-to-digital converter and method thereof
US6762706B2 · kind B2 · utility
4Cited by
11References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2002 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Jun 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reduced power analog-to-digital (A/D) converter is disclosed herein. Reference current to an op-amp used in an A/D converter is reduced during later conversion cycles in an A/D conversion process. The reference current to the op-amp can be reduced without sacrificing overall accuracy of the output of the analog-to-digital converter, even though reducing the current to the op-amp reduces the accuracy of the op-amp. This is possible because the op-amp only needs to operate at maximum accuracy during the first conversion cycle, and can operate at reduced levels of accuracy during later conversion cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.