Image processing system with multiple processing units
US6763150B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2000 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Jul 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/411
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit for processing a first image including two image supply blocks, two image processing units, a control unit and a plurality of buses. The image supply blocks assert selected lines of image data onto a respective one of first and second plurality of buses. The image processing units each process the data according to respective algorithms and provide respective update ok signals that each indicate that the respective image processing unit has completed use of the first sub-portion of data. The image supply blocks provide respective update signals to the image processing units in response to the update ok signals from both of the image processing units, transfer data from the second sub-portion to the first, and assert new data on the second sub-portion. Each image processing unit, in response to receiving both update signals, changes state to track the data without losing bus cycles to maintain performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.