Semiconductor device having metal-insulator-metal capacitor and fabrication method thereof
US6765255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2003 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Mar 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a capacitor of an MIM structure and a method of forming the same are described. The semiconductor device includes a semiconductor substrate; a first bottom interconnection formed over the semiconductor substrate; an intermetal dielectric layer formed over the semiconductor substrate; a plurality of openings exposing the first bottom interconnection through the intermetal dielectric layer; a bottom electrode conformally formed on the inside wall of the openings, on the exposed surface of the first bottom interconnection and on the intermetal dielectric layer between the openings; a dielectric layer and an upper electrode sequentially stacked on the bottom electrode; and a first upper interconnection disposed on the upper electrode. According to the present invention, an effective surface area per a unit planar area of a capacitor with an MIM structure is enlarged to increase capacitance thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.