Device structure and method for reducing silicide encroachment
US6765273B1 · kind B1 · utility
232Cited by
29References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1998 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Jul 14, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.