System and method for inspecting bumped wafers
US6765666B1 · kind B1 · utility
9Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2000 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Apr 26, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01N21/95607
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for inspecting a component, such as a die formed on a silicon wafer, is provided. The system includes a two dimensional inspection system that can locate one or more features, such as bump contacts on the die, and which can also generate feature coordinate data. The system also includes a three dimensional inspection system that is connected to the two dimensional inspection system, such as through an operating system of a processor. The three dimensional inspection system receives the feature coordinate data and generates inspection control data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.