Delay-locked loop for differential clock signals
US6765976B1 · kind B1 · utility
39Cited by
16References
29Claims
0Family size
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Key dates
| Filing date | Sep 13, 2000 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | May 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0896
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.