Method for sharing a translation lookaside buffer between CPUs

US6766434B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Ute Gaertner · Schenefeld, DE
• Norbert Hagspiel · Wissen, DE
• Frank Lehnert · Weil im Schönbuch, DE
• Erwin Pfeffer · Eppelheim, DE
• Kerstin Claudia Schelm · Stuttgart, DE

Key dates

• Filing date: Apr 19, 2002
• Grant date: Jul 20, 2004
• Expiry date: Jan 22, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F12/1027
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

The present invention generally relates to shared-memory multiprocessor systems, such as IBM ESA/390 or RS/6000 systems, and deals more particularly with a method and system for sharing a second-level translation lookaside buffer (TLB 2) between several CPUs (30a, . . . 30d) for improving the performance and reducing the chip area required to buffer the results of virtual-to-absolute address translations. The inventive TLB2 organization comprises several small arrays (32a, . . . 32d) dedicated to particular CPUs, providing an interface to a major array (21), which is shared between the CPUs. The dedicated arrays 32a, . . . 32d) are required to fulfill the architected constraints and link several CPUs to the commonly used shared array (21).