Joint test action group (JTAG) tester, such as to test integrated circuits in parallel
US6766486B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 2000 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Apr 26, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318555
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A JTAG tester includes a JTAG controller in a PCI slot of a PC, a port multiplexer, a programmable power supply, and drive and compare logic, which tracks Vcc. The tester reads and blows information and configuration fuses on the silicon using the JTAG port. The tester pipes the JTAG port into a 1-to-N multiplexer, where N is the number of sockets being tested in parallel. The multiplexer is different from conventional multiplexers in that it allows selection of any combination of sockets, not just any one of the N sockets. Thus the same data can be driven into any combination of devices for parallel programming of fuse registers. Data being read out is read one device for separate evaluation via the single port back to the controller PC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.