Self-aligned transistor and diode topologies in silicon carbide through the use of selective epitaxy or selective implantation
US6767783B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Jul 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
Abstract
A method of making vertical diodes and transistors in SiC is provided. The method according to the invention uses a mask (e.g., a mask that has been previously used for etching features into the device) for selective epitaxial growth or selective ion implantation. In this manner, the gate and base regions of static induction transistors and bipolar junction transistors can be formed in a self-aligned process. A method of making planar diodes and planar edge termination structures (e.g., guard rings) is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.