Method of fabricating complementary self-aligned bipolar transistors

US6767797B2 · kind B2 · utility

Assignee

• Agere Systems Inc. · US

Inventor

• Thomas J. Krutsick · Kutztown, US

Key dates

• Filing date: Feb 1, 2002
• Grant date: Jul 27, 2004
• Expiry date: Feb 1, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/673

Abstract

Complementary bipolar transistors are fabricated on a semiconductor wafer by forming, first and second electrodes corresponding to first and second complementary transistors, respectively. A first impurity is selectively introduced into the first and second electrodes. A third electrode corresponding to the first transistor is formed, the third electrode being self-aligned with and electrically isolated from the first electrode, and a fourth electrode is formed corresponding to the second transistor, the fourth electrode being self-aligned with and electrically isolated from the second electrode. A second impurity is selectively introduced into the third and fourth electrodes. First active regions of the first and second transistors are formed, whereby the first impurity diffuses into the first active regions. Likewise, second active regions of the first and second transistors are formed, whereby the second impurity diffuses into the second active regions. A reduction in the number of fabrication steps and/or masks is thereby achieved.