Semiconductor memory device with memory cells having same characteristics and manufacturing method for the same
US6768151B2 · kind B2 · utility
13Cited by
9References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 17, 2003 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Jan 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/12
Abstract
In a method of manufacturing a semiconductor memory device, a lower electrode film is formed on a semiconductor substrate via an interlayer insulating film. A ferroelectric film is formed on the lower electrode layer while heating the lower electrode layer uniformly in the cell array region. An upper electrode film is formed on the ferroelectric film. Ferroelectric capacitors are formed in a memory cell array region. Each of the ferroelectric capacitors includes the lower electrode film, the ferroelectric film and the upper electrode film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.