Automated combi deposition apparatus and method
US6768213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2001 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Jan 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and system for protecting global alignment marks during the fabrication of wafers are described. A semiconductor wafer-in-process includes a substrate having one or more global alignment sites, each site having an alignment mark. A photoresist material is deposited over the wafer-in-process, including over the alignment marks. A stepper or other suitable device exposes full field images over the entire wafer-in-process, thus exposing a portion of the photoresist material covering the alignment marks which is developed. A globule of protective material is deposited over the patterned photoresist over the alignment marks, thus protecting them during a subsequent etching step. The globule of protective material can also be deposited over a portion of any other adjacent structures which need protection during etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.