Register controlled DLL for reducing current consumption
US6768690B2 · kind B2 · utility
25Cited by
13References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Oct 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00104
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A resister controlled delay locked loop (DLL) is provided which is capable of reducing current consumption by operating the DLL loop when the semiconductor device is only at an operation mode. A semiconductor device having the register controlled DLL and an internal circuit synchronized with a DLL clock signal output from the register controlled DLL, includes an enable signal generator generating an enable signal for the register controlled DLL to control a generation of the DLL clock signal in response to an activation or non-activation signal of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.