Configuration of fuses in semiconductor structures with Cu metallization
US6774456B2 · kind B2 · utility
4Cited by
8References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2001 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Mar 12, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/91
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A configuration of fuses in a semiconductor structure having Cu metallization planes is provided. The semiconductor structure has an Al metal layer on the topmost interconnect plane for providing Al bonding pads. The fuses are configured as Al fuses and, in the semiconductor structure having Cu metallization planes, are provided above the diffusion barrier of the topmost Cu metallization plane but below a passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.