Aggregation of storage elements into stations and placement of same into an integrated circuit or design
US6775813B2 · kind B2 · utility
4Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2002 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Sep 10, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention describes a method and apparatus for placing flops in a complex circuit design. Initially, the method calculates a physical range for every net that requires a flop, within which the flop can be placed satisfying the timing requirement. After the physical range is defined, the method groups these flops and determines a block where these grouped flops can be placed. Grouping these flops into one block (flop station) can preserve a compact layout for the design. The flops are then connected to appropriate nets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.