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US6776399B2 · kind B2 · utility
0Cited by
12References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 2002 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | May 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate having upper and lower surfaces, the upper surface including a periphery defined by first and second spaced apart side edges and front and rear spaced apart edges; a power semiconductor die disposed on the upper surface of the substrate, the die including a top surface on which at least a first metalized surface is disposed and a bottom surface; a plurality of conductive pads disposed only at the second side edge of the substrate; and a plurality of wire bonds extending from the first metalized surface to the plurality of conductive pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.